The papers, "Elastomeric Connectors-Attributes, Comparisons, and Potential," by W. R. Lambert et al., Proceedings of the National Electronic Packaging and Production Conference," Vol. 3, pp. 1512-1526, February 1991, and "Applications and Reliability of the AT&T Elastomeric Conductive Polymer Interconnection (ECPI) System," by J. A. Fulton et al., Proceedings of the International Electronics Packaging Conference," Marlboro, Mass., pp. 930-943, September 1990, and the U.S. patent of Lambert et al., U.S. Pat. No. 4,820,376, all hereby incorporated herein by reference, describe the use of anisotropic conductive material for interconnecting electronic devices. Anisotropic conductive material is material in the form of a flat sheet that conducts electrical current across its thickness only and not in the length or width dimensions. The references discuss a particular kind of anisotropic conductive material known as Elastomeric Conductive Polymer Interconnect (ECPI) material which comprises chains of conductive particles which are magnetically aligned in columns in an elastomeric matrix to provide conduction only in the thickness of Z direction. It is known that such materials can be used to provide a dependable interconnection between an array of conductors on a device to be tested with an array of conductors on a test fixture. The electronic device to be tested is typically mechanically compressed against the ECPI material to give dependable electrical interconnection to conductor pads of the test fixture.
The paper, "Flip-Chip Soldering to Bare Copper Circuits," by A. P. Ingraham et al., Proceedings of the Fortieth Electronic Components and Technology Conference, Las Vegas, Nev., pp. 333-337, May 1990, is an example of the prior art that describes a method for packaging and connecting integrated circuit chips known as flip-chip bonding or soldering. With this method, all terminals of the integrated circuit chip are located as conductor pads on one surface of the chip with a solder bump applied to each conductor pad. The chip is then mounted on a substrate with each solder bump contacting a conductor pad of the circuit to which it is to be connected. The apparatus is heated to reflow the solder and cause it to adhere to the conductor pads of the substrate so that thereafter the solder bumps constitute both an electrical interconnection and a bonding member for securing the integrated circuit chip to the substrate. Applying the solder bumps to the bonding pads of the integrated circuit can result in malfunctions if placement is not accurate, and so it is customary to test the integrated circuit chip after it has been permanently bonded to the substrate. A drawback of this process is that, if the chip fails test, the solder bumps must be remelted so that the chip can be removed, and remnant solder must be cleaned from the substrate to avoid bridging or short circuits when the chip is replaced. The U.S. patent of Liu et al., U.S. Pat. No. 4,923,521, is an example of prior art describing methods for removing remnant solder.
It would be desirable to provide a method for testing integrated circuit chips after the solder bumps have been applied but before permanent bonding to the substrate. For this purpose, we have tried to use ECPI to provide a temporary interconnect between the solder bumps and contact pads of a test fixture. Unfortunately, we have found that the straightforward use of ECPI material in this manner does not provide reliable test results. There is therefore a continuing long-felt need in the industry for better methods for testing electronic devices, particularly flip-chip integrated circuit devices having an array of solder bumps on one surface.